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AMD touts EPYC rack throughput for agentic AI systems

AMD touts EPYC rack throughput for agentic AI systems

Wed, 10th Jun 2026 (Today)

AMD said its EPYC processors offer higher rack-scale CPU throughput for agentic AI infrastructure than rival products, based on a modelled 100 kW rack scenario.

In the workloads it examined, AMD estimated that the EPYC 9965 delivered 2.37 times the rack-level throughput of Nvidia Vera and about 1.6 times that of Intel Xeon 6980P. It added that the next-generation EPYC "Venice" processor was projected to widen the gap with Vera to 3.30 times.

The claims centre on the growing CPU demands of agentic AI systems, which rely on orchestration services, databases, web front ends, caches, middleware, application programming interfaces and control-plane services alongside model inference. AMD argued that these supporting services are largely CPU-bound and can become a bottleneck as companies move from AI pilots to full production systems.

Rack focus

Rather than relying on single-chip benchmark results, AMD framed the comparison around what can be deployed in a rack constrained by power, cooling and floor space. It said the key measure for data centre operators is how much useful work fits inside a 100 kW rack using two-processor platforms.

In AMD's analysis, EPYC led in general-purpose compute, server-side Java, web serving, key-value stores, in-memory caching and relational databases. The cited benchmarks included SPEC CPU 2017 Integer Rate, a SPECjbb2015-derived Java workload, NGINX with WRK, redis-benchmark, Memcached with memtier_benchmark and TPROC-C on MySQL.

AMD said the benchmark set was intended to isolate the infrastructure layers that agentic AI systems depend on, rather than model full end-to-end agent pipelines. It added that system power and nodes per rack were normalised to Nvidia Vera for the rack-level comparison.

Density claims

AMD said a deployment based on EPYC "Turin" in a Dell PowerEdge IR7000 or similar liquid-cooled rack could support more than 27,000 CPU cores per rack. It added that the "Venice" generation was designed to scale beyond 36,000 cores in the same rack class.

AMD used those figures to argue that customers can deploy dense CPU infrastructure now on standard x86 systems rather than wait for alternative architectures. It said such deployments would preserve software continuity and avoid the need for a new rack design.

The comparison comes as chipmakers compete to show that AI infrastructure demand extends beyond graphics processors. While Nvidia has dominated much of the discussion around AI hardware, server CPU suppliers increasingly argue that data handling, orchestration and transaction-heavy workloads remain central to the economics of large-scale AI systems.

Per-core view

AMD also highlighted single-threaded and per-core performance, which it said remains important for workloads such as databases, analytics, simulations and host processing in multi-GPU servers. It said a 64-core "Venice" CPU was estimated to deliver a 27% performance-per-core advantage over the 88-core Vera processor.

At higher core counts, AMD said a 96-core "Venice" chip was projected to retain an 11% performance-per-core lead over Vera. Like the broader "Venice" rack-level comparisons, those figures were presented as estimates based on modelled and projected configurations rather than deployed systems.

AMD said the main conclusion for customers building agentic AI systems is that deployable rack-level CPU throughput matters more than isolated component claims, especially where power, thermal limits and software compatibility shape what can be installed in production environments.